Feedforward Noise Cancelling Techniques

Supply noise is one of the major considerations in almost all analog building blocks. In the past, adequate supply rejection is usually achieved with circuit isolation or excess capacitive coupling. However, this brute force method requires large silicon area and degrades feedback bandwidth. In this study, a method of enhancing the power supply rejection (PSR) of a system by using a fast feed-forward path to cancel the noise is investigated. This method is applied to a 25mA, 0.18μm low drop-out regulator (LDO) as well as a 1.5mW, 500MHz to 2.5GHz charge pump phase locked loop (PLL). Simulation results show that this feedforward noise cancellation (FFNC) method improves PSR of either system by at least 20dB up to a noise frequency of 10MHz. Measurement of the two prototype circuits that have been fabricated in National Semiconductor’s CMOS9T5V 0.18μm process show an improvement of at least 16dB in PSR at 10MHz. A background calibration method that is used to provide the correct gain for the FFNC is also designed and tested